Senior Digital Verification Engineer

Senior Digital Verification Engineer

ADI - Analog Devices

Milan, Italy

The Digital Design & Functional Verification team is seeking a motivated Senior Digital Verification Engineer to provide support to our Auto Electrification and Sustainable Energy (AES) Business Unit located at ADI’s Milan design center.

Responsibilities include, but not limited to:

  • Interact with product definers and business managers during the preliminary phase of the design to consolidate and fully understand the requirements and the specification of the design;
  • Create and keep updated a Verification Plan;
  • Architect the testbench based on what is planned on Verification Plan;
  • Write directed test case and then use randomization to achieve a good functional and code coverage;
  • Write System Verilog assertion based on what planned on Verification Plan;
  • Track bugs found during verification phase and hold verification reviews with product definers and digital designer.

Minimum qualifications:

  • Electronic Engineer Bachelor degree;
  • Being familiar with Windows and Linux OS;
  • Verilog/SystemVerilog knowledge;
  • CMOS logic and more in general ASIC and VLSI design;
  • Object-Oriented Programming knowledge;
  • Basic concepts of UVM;
  • Knowledge of Real Number Modeling;
  • 4+ years of relevant experience.

Preferred qualifications:

  • Electronic Engineer Master degree;
  • Basic Analog Circuits knowledge, in particular DC-DC converters common architecture;
  • Cadence tools skills;
  • Being familiar with Digital Design Flow.

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