Develop, qualify, release and maintain Process Design Kits (PDKs) for Cadence and Synopsys for analog and mixed-signal semiconductor technologies
Take an active role in advancing PDK development methodologies, qualification strategies and design enablement solutions, with opportunities to grow into broader technical leadership responsibilities
Collaborate closely with our foundry-organisation, EDA vendors and technology development teams to enable new processes, design capabilities and tool flows
Drive development of automation, validation and regression frameworks using Python, Tcl and Linux-based engineering environments
Define qualification and release strategies ensuring consistency across schematic design, simulation, physical verification and extraction
Create technical documentation, conduct training and support critical engineering projects and technology migrations across the organization
Provide technical leadership and mentorship for global engineering teams and contribute to the definition of long-term design enablement methodologies
Who we are looking for
Degree in Electrical Engineering, Microelectronics, Physics or related discipline
Extensive experience (>6 years) in PDK development, CAD engineering or design enablement
Deep understanding of semiconductor processes, device behavior and custom IC design flows
Experience working with foundries, technology development teams and EDA Vendors
Strong programming and automation skills in Python, Tcl and Linux/Unix environments e.g. for iPDK PyCells and/or Skill based PCells
Experience applying AI, ML or LLM technologies to engineering automation and productivity improvements is considered an advantage
Proven ability to drive technical initiatives, mentor engineers and communicate fluently in English with global teams and stakeholders; German language skills are an advantage
Don't forget to mention EuroEngineerJobs when applying.