Senior Principal Engineer - PMIC IC Architect

ams OSRAM

Premstätten, Austria

Your tasks

As a Sr. Principal Analog Design Engineer (PMIC), you are a senior technical authority within R&D, responsible for defining, designing and validating high performance power management solutions:

Architectural ownership of overall PMIC system after initial concept phase by system solution engineer;
Hands on design of complex analog and power blocks, including: LDOs (high PSRR, low IQ, high current), switching regulators (buck, boost, buck boost, charge pumps), power stages using BCD/HV CMOS/DMOS technologies, DC-DC converters and control loops, high voltage/high current devices in BCD processes, references, biasing, protection, monitoring and fault handling circuits, LED Drivers;
Definition of top level and high block level specifications considering system constraints and requirements;
Expert level simulation and system level verification;
Technical guidance of layout for power critical blocks (parasitics, IR drop, EM, ESD, isolation);
Deep involvement in silicon bring up and root cause analysis;
Leading and challenging design reviews, acting as design authority within the analog and power community;
Cross functional collaboration with design, layout, verification, test, product engineering, technology development and foundry interfaces;
Contribution to IP reuse strategies, design quality standards and long term PMIC roadmap;
Provide effort estimation for project planning;
Mentoring and coaching of junior and senior engineers.

Who we are looking for

Master’s degree or PhD in Electrical Engineering or a related discipline;
12+ years of experience in analog/mixed signal IC design with focus on PMICs;
Proven expert knowledge in power related analog design, especially: linear regulators (LDOs), DC-DC converters and control loops, high voltage/high current devices in BCD processes, analog building blocks (op amps, references, biasing, POR, protection);
Solid understanding of stability, loop compensation, transient behavior, start up and fault scenarios;
Experience with layout aware design, power integrity, thermal aspects and reliability;
Track record of successful silicon releases and production support;
Strong analytical skills and ability to solve complex multidisciplinary problems;
Excellent communication skills and confidence operating at senior technical level;
Fluent English required; German is an advantage.