Senior Analog IC Design Engineer
onsemi
Marin-Epagnier, Switzerland
The Role
We are seeking a Senior Analog IC Design Engineer to join our Precision Analog Team. In this role, you will design and develop IP for next-generation Automotive, Industrial, and Medical products. You’ll contribute to complex mixed-signal IPs and work with analog blocks such as DACs, ADCs, PLLs, and wireless interfaces.
Responsibilities
What You’ll Do
- Define architectures and participate in feasibility studies for new analog/mixed-signal IP components;
- Drive design, verification, layout, and bench evaluation of state-of-the-art CMOS and SOI designs which can be reused across different market segments;
- Lead small teams on sub-projects and contribute to SoC integration;
- Propose innovative solutions to meet customer and product needs;
- Collaborate on DFT strategies and document designs thoroughly;
- Partner with test, product, and applications engineering to ensure successful production release;
- Document designs including architecture and circuit descriptions, testing procedures, and safety mechanisms.
Qualifications
What You’ll Need
- Minimum BS/MS in Electrical Engineering or related technical field;
- 5+ years in analog IC design experience (schematic, layout, simulation);
- A thorough understanding of semiconductor physics and IC processes;
- Prior exposure to analog design in deep-submicron processes (65nm or below);
- Creativity, dynamism, reliability and team spirit;
- Excellent English written and verbal communication skills;
- Eligibility to work in Switzerland.
What Else You May Bring
Experience in some of the following areas is a plus:
- Project/task leadership;
- Capacity to think at the system level;
- Knowledge of Verilog/SystemVerilog, Verilog-A or VHDL-AMS is a plus;
- Design of accelerators and signal processing components;
- Experience in low power;
- Previous experience in one of the following fields: ADC, DAC, PLL;
- Knowledge in Functional Safety;
- Knowledge of French.
Don't forget to mention EuroEngineerJobs when applying.