Principal Engineer - Hardware Methodology

Principal Engineer - Hardware Methodology

Arm

Cambridge or Trondheim

We are looking for a Principal Engineer, acting as a technical leader passionate about closing the gap between RTL and physical design, to join Arm’s Design Implementation Readiness team in the Productivity Engineering group. This team develops robust and scalable methodologies, solutions and standards to support the active developments of hardware teams in Arm – accelerating innovation & optimizing energy efficiency while reducing the risks of silicon issues.

Job Overview:

In this role, you will take ownership of defining a collaborative methodology enabling hardware design teams at Arm to create the best possible and power-optimized hardware descriptions, and actively supply to the development of targeted solutions. Your contributions will impact a wide range of products, from Soft IPs to SoCs!

You will join an international team of creative engineers working together to address the challenges of creating high quality and physical-aware microarchitecture. Additionally, you will closely work with different physical design and RTL teams across Arm, and collaborate with key Electronic Design Automation (EDA) partners.

Responsibilities:

• Own and drive with collaborators the methodology roadmap for improving the feedback loop between physical design and hardware description (RTL);
• Define, develop and deploy new methodologies to improve RTL & physical design efficiency across diverse product lines;
• Collaborate with EDA partners and other solution providers to make smart usage of available solutions;
• Pilot initiatives enabling a groundbreaking usage of AI in the hardware design space.

Required Skills and Experience:

• Master’s degree in Electrical Engineering, Computer Engineering or other relevant technical fields;
• Experience in hardware design, verification or physical implementation;
• Ability to demonstrate that you can express new insights and communicate them successfully, and develop for others by taking on board external perspectives;
• Experience in crafting and adopting new RTL optimizations or physical implementation techniques & methodologies, and promote their use with international teams;
• Programming and scripting skills, using Python, C++, TCL or other relevant programming languages.

“Nice To Have” Skills and Experience:

• Experience with hardware description languages (e.g. Verilog RTL design);
• Worked with multiple EDA providers;
• Experience with large SoCs or advanced CPU/GPU designs;
• Arm-based designs and/or Arm architectures.