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Lead chip-level and IP-level ESD protection design, simulation, and verification (e.g., LVS, DRC, DFM). Engage in the development of protection devices and circuits to address Analog Devices’ IC product ESD robustness requirements. Ensure all products
Work directly with Quality and Production teams to solve complex manufacturing problems using structured problem-solving methodologies (e.g. PDCA, 8D, Fishbone analysis); Develop and implement strategies to reduce process variation and improve first-pass