ADI’s drive to provide solutions for the next generation of 5G communications infrastructure, integration of ORAN in the network is a major step forward in adding value to the radio unit and related products. The added value from radio unit by ORAN IP cores is eCPRI and a LowPhy. Other algorithms will also play a role as the application evolves. These IP cores as well as others are used in ASIC’s within ADI as well as sold standalone to FPGA customers.
To support those activities within the Wireless Communication Business unit, we are seeking a Design Verification Engineer. The successful candidate will join an existing team with digital verification experts, algorithm, RTL, software, and systems architects. A central part of the role will be to extend the UVM environment, define, build, and execute test cases to cover the requirements set by the architects.
As a member of a very talented wireless system team, you will be at the heart of the chip design effort collaborating with all disciplines. You will have the opportunity to engage with the wider aspects of the system and product development including design/test and documentation. It's required that you communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. We also require additional responsibilities such as running regressions, tracking bugs, and analyzing coverage to achieve and bring the IP cores to a real-world quality implementation for our internal as well as external customers.